https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77571
Richard Earnshaw <rearnsha at gcc dot gnu.org> changed: What |Removed |Added ---------------------------------------------------------------------------- Status|NEW |RESOLVED Resolution|--- |INVALID --- Comment #5 from Richard Earnshaw <rearnsha at gcc dot gnu.org> --- This is something the kernel has to address. If the system has processors with differently sized cache line lengths, then the OS needs to virtualize the relevant system registers to report an appropriate (safe) line length. Any other approach will likely have race conditions.