https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77289
Segher Boessenkool <segher at gcc dot gnu.org> changed:
What |Removed |Added
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CC| |segher at gcc dot gnu.org
--- Comment #2 from Segher Boessenkool <segher at gcc dot gnu.org> ---
It already goes wrong at IRA:
(insn 77 79 71 3 (parallel [
(set (reg:SF 33 1)
(mem:SF (plus:SI (reg/f:SI 113 sfp)
(const_int 8 [0x8])) [1 MEM[base: _17, offset: 0B]+0 S4
A32]))
(set (reg:SI 208 [ ivtmp.6 ])
(plus:SI (reg/f:SI 113 sfp)
(const_int 8 [0x8])))
]) 77289.c:9 617 {*movsf_update1}
(nil))
where 208 is assigned r31:
19:r206 l0 29 1:r208 l0 31 2:r209 l0 30 18:r247 l0 75
but the pattern is
(define_insn "*movsf_update1"
[(set (match_operand:SF 3 "gpc_reg_operand" "=f,f")
(mem:SF (plus:SI (match_operand:SI 1 "gpc_reg_operand" "0,0")
(match_operand:SI 2 "reg_or_short_operand" "r,I"))))
(set (match_operand:SI 0 "gpc_reg_operand" "=b,b")
(plus:SI (match_dup 1) (match_dup 2)))]
so operand 1 is not the same as operand 0.
