https://gcc.gnu.org/bugzilla/show_bug.cgi?id=72778
Uroš Bizjak <ubizjak at gmail dot com> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |NEW
Last reconfirmed| |2016-08-03
Component|middle-end |rtl-optimization
Ever confirmed|0 |1
--- Comment #6 from Uroš Bizjak <ubizjak at gmail dot com> ---
Before the patch, register allocator used to leave self-assignments (e.g. insn
20) in the insn stream. Post-reload vzeroupper insertion mode-swithing pass
depends on these instructions. Self-assignments are later removed by subsequent
passes.
...
(insn 6 19 20 2 (parallel [
(set (reg:SI 0 ax [orig:88 _5 ] [88])
(unspec_volatile:SI [
(mem/v:SI (reg/v/f:DI 5 di [orig:90 l ] [90]) [-1 S4
A32])
(const_int 32773 [0x8005])
] UNSPECV_XCHG))
(set (mem/v:SI (reg/v/f:DI 5 di [orig:90 l ] [90]) [-1 S4 A32])
(plus:SI (mem/v:SI (reg/v/f:DI 5 di [orig:90 l ] [90]) [-1 S4
A32])
(reg:SI 0 ax [orig:88 _5 ] [88])))
(clobber (reg:CC 17 flags))
]) /home/uros/gcc-svn/trunk/libgo/runtime/sema.goc:345 4933
{atomic_fetch_addsi}
(nil))
(insn 20 6 7 2 (set (reg:SI 0 ax [orig:88 _5 ] [88])
(reg:SI 0 ax [orig:88 _5 ] [88]))
/home/uros/gcc-svn/trunk/libgo/runtime/sema.goc:345 82 {*movsi_internal}
(nil))
...
Can we have these self-assignments back?
