https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71942

--- Comment #6 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Take example in comment #1:
This is what is produced for AARCH64:

(insn 8 6 9 (set (reg:HI 77)
        (mem/v/c:HI (plus:DI (reg/f:DI 68 virtual-stack-vars)
                (const_int -2 [0xfffffffffffffffe])) [1 foo+0 S2 A16])) t6.c:4
-1
     (nil))

(insn 9 8 0 (set (reg:SI 73 [ foo.0_4 ])
        (zero_extend:SI (reg:HI 77))) t6.c:4 -1
     (nil))

GCC does not know that insn 8 produces a zero extended to SI mode or not.  It
just knows it is HI mode.

Reply via email to