https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71453
Bug ID: 71453
Summary: Spills to vector registers are sub-optimal.
Product: gcc
Version: 7.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: rtl-optimization
Assignee: unassigned at gcc dot gnu.org
Reporter: ysrumyan at gmail dot com
Target Milestone: ---
We notice significant performance regression on one important benchmark after
r235523.
Note that fix is not responsible for it. A problem is related to spill/fill
to/from vector registers (aka xmm registers). For example, for attached
test-case we can see a nimber of redundant "vector registers spills" and
movements between them:
vmovd %ecx, %xmm5
vmovd %xmm5, %ecx
vmovd %xmm5, 40(%esp) !! It wil be more profitable to save %ecx on stack.
vmovdqa %xmm3, %xmm5 !! this is completely redundant.
...
There is also another issue with spill to vector registers - we must estimate
profitability of such spill in comparison with spill on stack. For example,
such spill can be not profitable if fill to register is not required:
movl %eax, 44(%esp) !! spill
...
andl 44(%esp), %eax !! fill is not required.
