[Bug target/71389] [7 Regression] ICE on trunk gcc on ivybridge target (df_refs_verify)

[ubizjak at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71389

--- Comment #3 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to Uroš Bizjak from comment #2)

> (gdb) p debug_rtx (insn)
> (insn 198 206 199 11 (set (mem/c:V16QI (plus:DI (reg/f:DI 20 frame)
>                 (const_int -664 [0xfffffffffffffd68])) [7 MEM[(value_type
> &)&v13 + 344]+16 S16 A64])
>         (vec_select:V16QI (subreg:V32QI (reg:V8SI 175) 0)
>             (parallel [
>                     (const_int 16 [0x10])
>                     (const_int 17 [0x11])
>                     (const_int 18 [0x12])
>                     (const_int 19 [0x13])
>                     (const_int 20 [0x14])
>                     (const_int 21 [0x15])
>                     (const_int 22 [0x16])
>                     (const_int 23 [0x17])
>                     (const_int 24 [0x18])
>                     (const_int 25 [0x19])
>                     (const_int 26 [0x1a])
>                     (const_int 27 [0x1b])
>                     (const_int 28 [0x1c])
>                     (const_int 29 [0x1d])
>                     (const_int 30 [0x1e])
>                     (const_int 31 [0x1f])
>                 ]))) -1
>      (expr_list:REG_DEAD (reg:V8SI 175)
>         (nil)))

I can't see the reason why the above pattern is not recognized as:

(define_insn "vec_extract_hi_v32qi"
  [(set (match_operand:V16QI 0 "nonimmediate_operand" "=x,m,v,m,v,m")
        (vec_select:V16QI
          (match_operand:V32QI 1 "register_operand" "x,x,v,v,v,v")
          (parallel [(const_int 16) (const_int 17)
                     (const_int 18) (const_int 19)
                     (const_int 20) (const_int 21)
                     (const_int 22) (const_int 23)
                     (const_int 24) (const_int 25)
                     (const_int 26) (const_int 27)
                     (const_int 28) (const_int 29)
                     (const_int 30) (const_int 31)])))]
  "TARGET_AVX"
  "@
   vextract%~128\t{$0x1, %1, %0|%0, %1, 0x1}
   vextract%~128\t{$0x1, %1, %0|%0, %1, 0x1}
   vextracti32x4\t{$0x1, %1, %0|%0, %1, 0x1}
   vextracti32x4\t{$0x1, %1, %0|%0, %1, 0x1}
   vextracti32x4\t{$0x1, %g1, %0|%0, %g1, 0x1}
   vextracti32x4\t{$0x1, %g1, %0|%0, %g1, 0x1}"
  [(set_attr "type" "sselog")
   (set_attr "prefix_extra" "1")
   (set_attr "length_immediate" "1")
   (set_attr "isa" "*,*,avx512dq,avx512dq,avx512f,avx512f")
   (set_attr "memory" "none,store,none,store,none,store")
   (set_attr "prefix" "vex,vex,evex,evex,evex,evex")
   (set_attr "mode" "OI")])