https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70568
acsawdey at gcc dot gnu.org changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |vmakarov at gcc dot gnu.org
Summary|PowerPC64: union of |[4.9/5/6 regression]
|floating and fixed doesn't |PowerPC64: union of
|use POWER8 GPR/VSR moves |floating and fixed doesn't
| |use POWER8 GPR/VSR moves
--- Comment #3 from acsawdey at gcc dot gnu.org ---
Tracked this back to 210824, and in particular this change:
@@ -860,10 +897,15 @@
}
}
- /* If the alternative actually allows memory, make
- things a bit cheaper since we won't need an extra
- insn to load it. */
- if (op_class != NO_REGS)
+ if (op_class == NO_REGS)
+ /* Although we don't need insn to reload from
+ memory, still accessing memory is usually more
+ expensive than a register. */
+ pp->mem_cost = frequency;
+ else
+ /* If the alternative actually allows memory, make
+ things a bit cheaper since we won't need an
+ extra insn to load it. */
pp->mem_cost
= ((out_p ? ira_memory_move_cost[mode][op_class][0] : 0)
+ (in_p ? ira_memory_move_cost[mode][op_class][1] : 0)
Without this change, you get this from IRA costs:
a0 (r157,l0) best GENERAL_REGS, allocno GENERAL_REGS
a0(r157,l0) costs: BASE_REGS:4000,4000 GENERAL_REGS:4000,4000
LINK_REGS:16000,16000 CTR_REGS:16000,16000 LINK_OR_CTR_REGS:16000,16000
SPEC_OR_GEN_REGS:16000,16000 MEM:4000,4000
and we pick the pattern for xscvdpspn.
With the change, you get
a0 (r157,l0) best NO_REGS, allocno NO_REGS
a0(r157,l0) costs: BASE_REGS:3000,3000 GENERAL_REGS:3000,3000
LINK_REGS:15000,15000 CTR_REGS:15000,15000 LINK_OR_CTR_REGS:15000,15000
SPEC_OR_GEN_REGS:15000,15000 MEM:2000,2000
And this gets done via memory instead of the register moves.
