https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70321
--- Comment #7 from Ilya Enkovich <ienkovich at gcc dot gnu.org> ---
(In reply to Jakub Jelinek from comment #6)
> Why couldn't STV just "vectorize" AND and NOT patterns and let the combiner
> combine that in the vectorized code?
I think the only thing we miss for that is corresponding NOT pattern in DI
mode.
For comparison we have
{r94:SI=r89:DI#4|r89:DI#0;clobber flags:CC;}
flags:CCZ=cmp(r94:SI,0)
combined into
{flags:CCZ=cmp(r89:DI#4|r89:DI#0,0);clobber scratch;}
which is converted into PTEST by STV.
