https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69677
--- Comment #14 from Ilya Enkovich <ienkovich at gcc dot gnu.org> ---
(In reply to H.J. Lu from comment #6)
> STV turns:
>
> insn 21 19 23 4 (parallel [
> (set (reg:DI 102 [ val ])
> (and:DI (reg/v:DI 97 [ val ])
> (mem/u:DI (plus:SI (mult:SI (reg/v:SI 96 [ mode ])
> (const_int 8 [0x8]))
> (symbol_ref:SI ("mode_mask_array") [flags 0x40]
> <var_decl 0xf517e160 mode_mask_array>)) [13 mode_mask_array S8 A64])))
> (clobber (reg:CC 17 flags))
> ]) /export/gnu/import/git/gcc-regression/gcc/gcc/simplify-rtx.c:134
> 332 {*anddi3_doubleword}
> (expr_list:REG_DEAD (reg/v:DI 97 [ val ])
> (expr_list:REG_DEAD (reg/v:SI 96 [ mode ])
> (expr_list:REG_UNUSED (reg:CC 17 flags)
> (nil)))))
> (insn 23 21 24 4 (parallel [
> (set (reg:DI 103)
> (ashift:DI (const_int 1 [0x1])
> (subreg:QI (reg:SI 91 [ _8 ]) 0)))
> (clobber (reg:CC 17 flags))
> ]) /export/gnu/import/git/gcc-regression/gcc/gcc/simplify-rtx.c:135
> 449 {*ashldi3_doubleword}
> (expr_list:REG_DEAD (reg:SI 91 [ _8 ])
> (expr_list:REG_UNUSED (reg:CC 17 flags)
> (nil))))
>
> into
> (insn 47 19 21 4 (set (reg:DI 111)
> (mem/u:DI (plus:SI (mult:SI (reg/v:SI 96 [ mode ])
> (const_int 8 [0x8]))
> (symbol_ref:SI ("mode_mask_array") [flags 0x40] <var_decl
> 0xf517e160 mode_mask_array>)) [13 mode_mask_array S8 A64]))
> /export/gnu/import/git/gcc-regression/gcc/gcc/simplify-rtx.c:134 -1
> (nil))
> (insn 21 47 23 4 (set (subreg:V2DI (reg:DI 102 [ val ]) 0)
> (and:V2DI (subreg:V2DI (reg/v:DI 97 [ val ]) 0)
> (subreg:V2DI (reg:DI 111) 0)))
> /export/gnu/import/git/gcc-regression/gcc/gcc/simplify-rtx.c:134 3253
> {*andv2di3}
> (expr_list:REG_DEAD (reg/v:DI 97 [ val ])
> (expr_list:REG_DEAD (reg/v:SI 96 [ mode ])
> (expr_list:REG_UNUSED (reg:CC 17 flags)
> (nil)))))
> (insn 23 21 45 4 (parallel [
> (set (reg:DI 103)
> (ashift:DI (const_int 1 [0x1])
> (subreg:QI (reg:SI 91 [ _8 ]) 0)))
> (clobber (reg:CC 17 flags))
> ]) /export/gnu/import/git/gcc-regression/gcc/gcc/simplify-rtx.c:135
> 449 {*ashldi3_doubleword}
> (expr_list:REG_DEAD (reg:SI 91 [ _8 ])
> (expr_list:REG_UNUSED (reg:CC 17 flags)
> (nil))))
>
> So STV requires 16 byte stack alignment and uses 16 byte stack alignment.
I don't see how STV requires 16 byte stack alignment here. All registers are
DI here. Emitted movdqa is not produced by STV, it seems like LRA bug which
writes 8 bytes to stack but reads 16.
