https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69454
--- Comment #36 from H.J. Lu <hjl.tools at gmail dot com> --- (In reply to Richard Biener from comment #35) > I wonder why LRA cannot spill using unaligned moves? We keep track precise alignment requirement. RA will use spill/fill the used part of vector registers. For GPR, RA spill/fill the whole register since the minimal stack alignment is the GPR size. In ix86_minimum_alignment, since we only spill/fill SI registers, which need 32-bit alignment, we return 32 for DImode in 32-bit mode. Now STV introduce DImode spill/fill in 32-bit mode. If STV is used, ix86_minimum_alignment must return 64 for DImode. Otherwise, we are lying to RA.
