https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67477
--- Comment #4 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
The ICE has been on
(insn 105 746 971 5 (parallel [
(set (reg:V16QI 60 d22 [720])
(unspec:V16QI [
(reg:V16QI 60 d22 [720])
(reg:V16QI 60 d22 [720])
] UNSPEC_VTRN1))
(set (reg:V16QI 60 d22 [720])
(unspec:V16QI [
(reg:V16QI 60 d22 [720])
(reg:V16QI 60 d22 [720])
] UNSPEC_VTRN2))
]) pr67477.c:63 1972 {*neon_vtrnv16qi_insn}
(nil))
which was clearly invalid RTL, multiple sets of the same register. The insn
was still ok in the *.ira dump and broken in *.reload dump.
(define_insn "*neon_vtrn<mode>_insn"
[(set (match_operand:VDQW 0 "s_register_operand" "=w")
(unspec:VDQW [(match_operand:VDQW 1 "s_register_operand" "0")
(match_operand:VDQW 3 "s_register_operand" "2")]
UNSPEC_VTRN1))
(set (match_operand:VDQW 2 "s_register_operand" "=w")
(unspec:VDQW [(match_dup 1) (match_dup 3)]
UNSPEC_VTRN2))]
"TARGET_NEON"
"vtrn.<V_sz_elem>\t%<V_reg>0, %<V_reg>2"
[(set_attr "type" "neon_permute<q>")]
doesn't look like a target bug that would allow 2 same set destinations.
