https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67383
Renlin Li <renlin at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|NEW |RESOLVED
Resolution|--- |FIXED
--- Comment #7 from Renlin Li <renlin at gcc dot gnu.org> ---
Backport committed as r231177. It should fix the ICE in the particular case.
However, this is not the whole story. I just found another problem.
In the test case, there are code structure like this.
uint64_t callee (int a, int b, int c, int d);
uint64_t caller (int a, int b, int c, int d)
{
uint64_t res;
/*
single BB contains complicated data processing which requires register pair
*/
res = callee (tmp, b ,c, d);
return res;
}
CES pass in this case will extend the hard register live range across the whole
BB until the callee. In this case, r1, r2, r3 are excluded from allocatable
registers.
There are places in CES which prevents extending the hard register's live
range, for example for hard register which fullfil
small_register_classes_for_mode_p(), class_likely_spilled_p(). However,
argument registers belong to neither of them.
I tried to stop CES from extending argument registers live range. However,
later, scheduler jumps in and re-orders the instruction to reduce the pseudo
register pressure, which in effect extend the argument register live again.
