https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67366
--- Comment #11 from Ramana Radhakrishnan <ramana at gcc dot gnu.org> --- (In reply to rguent...@suse.de from comment #10) > On Thu, 27 Aug 2015, rearnsha at gcc dot gnu.org wrote: > > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67366 > > > > --- Comment #9 from Richard Earnshaw <rearnsha at gcc dot gnu.org> --- > > Does that really do the right thing? That is, does force_reg understand a > > misaligned memory op? In practice I think yes. > > > > Also, what if one memory operand is aligned, but the other not? Don't we > > want > > to have the right combination of aligned/misaligned instructions? > > I think you never get two MEMs, you at most get a constant on the > RHS of a store. Yep that's my understanding too. movmisalign<mode> has stricter rules compared to mov<mode> so we have to handle some of these carefully. The logic in here is essentially from neon.md : movmisalign<mode>, so some of it may not be relevant here in the scalar case, but it's probably better to be a bit defensive here. I tried playing with the HImode case but the pain I had was with the fact that HImode movmisalign expects a load into a HImode register and I hadn't got my head around that given other things I needed to finish up before leaving.
