https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66115
--- Comment #3 from carloscastro10 at hotmail dot com --- The AVX specification relaxed the memory alignment requirements for SSE operations when using the VEX prefix. In this case the use of a non-aligned memory address for an operand is valid. For reference, please read http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-vol-1-manual.pdf Section 14.9: Memory alignment, on page 14-33 (~347)
