https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65862
Bug ID: 65862
Summary: [MIPS] IRA/LRA issue: integers spilled to
floating-point registers
Product: gcc
Version: 5.1.1
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: rtl-optimization
Assignee: unassigned at gcc dot gnu.org
Reporter: robert.suchanek at imgtec dot com
CC: matthew.fortune at imgtec dot com, vmakarov at redhat dot
com,
wdijkstr at arm dot com
Following up the following thread:
https://gcc.gnu.org/ml/gcc/2015-04/msg00239.html
Here is a reduced testcase from the Linux kernel:
$ cat sort.c
int a, c;
int *b;
void
fn1(int p1, int *p2(void *, void *), void *p3(void *, void *, int)) {
int n = c;
for (;;) {
a = 1;
for (; a < n;) {
p1 && p2(0, (int *) (p1 + 1));
p3(0, b + p1, 0);
}
}
}
Spill/reload to/from FP reg should be triggerable with (tested on SVN rev.
222257):
$ mips-img-linux-gnu -mips32r6 -O2 sort.c
Because of ALL_REGS assigned to most of allocnos, LRA uses FP regs freely. The
class is preferred because of the equal cost between registers and memory. This
likely happened because of the following fix:
2011-12-20 Vladimir Makarov <[email protected]>
PR target/49865
* ira-costs.c (find_costs_and_classes): Prefer registers even
if the memory cost is the same.
As Matthew already pointed out, one way to prevent this is through increasing
the cost of moving between GP and FP registers for integral modes.
I briefly tested out Wilco's patch but it did not appear to have the same
effect as changing the cost and I've seen a few ICEs when building the kernel.
