https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65067
--- Comment #6 from Bernd Edlinger <bernd.edlinger at hotmail dot de> ---
Ok, I think I understand now, what is wrong.
r216989 did just cause the strict-alignment code path to be executed,
which was not the case before.
Actually the extract_bit_field code is also wrong, but the combine pass
replaces the two instruction sequence and/shift with ubfx, but for the
store_bit_field the generated code is way too complex for the combine pass.
So, this would by my first idea, how to fix it:
Index: expmed.c
===================================================================
--- expmed.c (revision 221087)
+++ expmed.c (working copy)
@@ -1080,6 +1080,15 @@ store_fixed_bit_field_1 (rtx op0, unsigned HOST_WI
mode = GET_MODE (op0);
gcc_assert (SCALAR_INT_MODE_P (mode));
+ if (MEM_P (op0) && bitsize < GET_MODE_BITSIZE (mode))
+ {
+ temp = copy_to_reg (op0);
+ store_bit_field_1 (temp, bitsize, bitnum, 0, 0,
+ mode, value, true);
+ emit_move_insn (op0, temp);
+ return;
+ }
+
/* Note that bitsize + bitnum can be greater than GET_MODE_BITSIZE (mode)
for invalid input, such as f5 from gcc.dg/pr48335-2.c. */
@@ -1852,6 +1861,14 @@ extract_fixed_bit_field_1 (machine_mode tmode, rtx
machine_mode mode = GET_MODE (op0);
gcc_assert (SCALAR_INT_MODE_P (mode));
+ if (MEM_P (op0) && bitsize < GET_MODE_BITSIZE (mode))
+ {
+ op0 = copy_to_reg (op0);
+ return extract_bit_field_1 (op0, bitsize, bitnum,
+ unsignedp, target,
+ mode, tmode, true);
+ }
+
/* Note that bitsize + bitnum can be greater than GET_MODE_BITSIZE (mode)
for invalid input, such as extract equivalent of f5 from
gcc.dg/pr48335-2.c. */
