[Bug rtl-optimization/64882] [5 Regression] ICE on valid code at -O3 with -g enabled in simplify_subreg, at simplify-rtx.c:5681

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64882

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
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                 CC|                            |uros at gcc dot gnu.org

--- Comment #2 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
I'd say the bug is either in postreload or in the backend.  At *.reload we
have:
(insn 32 197 59 3 (parallel [
            (set (reg/v:DI 0 ax [orig:87 f ] [87])
                (plus:DI (reg:DI 0 ax [106])
                    (reg:DI 1 dx [orig:104 D.1912 ] [104])))
            (clobber (reg:CC 17 flags))
        ]) pr64882.c:13 221 {*adddi_1}
     (expr_list:REG_EQUAL (plus:DI (reg:DI 1 dx [orig:104 D.1912 ] [104])
            (const_int 5278350700 [0x13a9d3d6c]))
        (nil)))
...
(insn 60 59 61 3 (set (reg:SI 2 cx [orig:103 D.1909 ] [103])
        (reg:SI 0 ax [orig:87 f ] [87])) pr64882.c:27 90 {*movsi_internal}
     (nil))

but in postreload

(insn 60 59 61 3 (set (reg:SI 2 cx [orig:103 D.1909 ] [103])
        (plus:DI (reg:DI 0 ax [106])
            (reg:DI 1 dx [orig:104 D.1912 ] [104]))) pr64882.c:27 213 {*leasi}
     (nil))

which is IMNSHO invalid RTL, because SET_DEST has different mode from SET_SRC.
But leasi pattern has the same modes in there:
(define_insn_and_split "*lea<mode>"
  [(set (match_operand:SWI48 0 "register_operand" "=r")
        (match_operand:SWI48 1 "address_no_seg_operand" "Ts"))]
so either recog didn't check the modes, or postreload failed to validize this
instruction.