https://gcc.gnu.org/bugzilla/show_bug.cgi?id=46164
Hale Wang <Hale.Wang at arm dot com> changed:
What |Removed |Added
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CC| |Hale.Wang at arm dot com
--- Comment #7 from Hale Wang <Hale.Wang at arm dot com> ---
(In reply to Tim Pambor from comment #4)
> Created attachment 33307 [details]
> testcase for gcc 4.9.1
>
> I think this bug is still present in gcc 4.9.1 and 4.8.4.
>
> I could reproduce the problem with the attached testcase using gcc 4.8.4
> with -O1 and -Og and 4.9.1 with -O1. -O0, -O2, -O3, -Os generated correct
> code. It generated the following assembler code:
>
> ...
> mov r0, r0 @ r0
> mov r4, r4 @ r1
> mov r2, r2 @ r2
> ...
>
> Expected would have been:
>
> ...
> mov r0, r0 @ r0
> mov r1, r1 @ r1
> mov r2, r2 @ r2
> ...
The combine pass combined the volatile register which caused this bug.
The expected assembler code should be:
mov r4, .L_temp
mov r1, r4
...
mov r0, r0 @ r0
mov r1, r1 @ r1
mov r2, r2 @ r2
But GCC combined the insns, and the code is generated as:
mov r4, .L_temp
...
mov r0, r0 @ r0
mov r4, r4 @ r1
mov r2, r2 @ r2
The register 'r1' is defined as volatile in this case. It should not be
combined.
