https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53513
Oleg Endo <olegendo at gcc dot gnu.org> changed:
What |Removed |Added
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Attachment #33745|0 |1
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--- Comment #37 from Oleg Endo <olegendo at gcc dot gnu.org> ---
Created attachment 33751
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=33751&action=edit
Use SImode for FPSCR, add __builtin_sh_get_fpscr, __builtin_sh_set_fpscr
I'm now testing this patch. It removes The PSImode for FPSCR completely and
splits the fpu_switch insn into two separate lds_fpscr and sts_fpscr insns.
This allows relaxing the insn dependencies. Also now that sts_fpscr becomes a
single-set insn, it can be stuffed into delay slots.
I've also removed the alternatives for FPSCR <-> memory, except the pre-dec and
post-inc ones, which are needed for push and pop insns. As a consequence, a
user initiated __builtin_sh_get_fpscr () to a memory will always be ferried
though a general register. There is some room for improvement, but it goes
into the direction of address-mode-selection optimization, which can be done
later.
When doing a __builtin_sh_set_fpscr (value) the compiler will always insert
code to preserve the current FPSCR FR, SZ, PR mode bits. This always involves
getting the current FPSCR into a general register first and then loading FPSCR
from a general register. Thus we can omit FPSCR loads from memory for now.
