[Bug target/62120] [ICE] ADDITIONAL_REGISTER_NAMES for [YZ]MMs, regno>8 should be disable in 32-bit

[tocarip at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62120

--- Comment #1 from tocarip at gcc dot gnu.org ---
Author: tocarip
Date: Tue Sep 30 16:04:15 2014
New Revision: 215729

URL: https://gcc.gnu.org/viewcvs?rev=215729&root=gcc&view=rev
Log:
Fix PR 62120.

gcc/
2014-09-30  Ilya Tocar  <ilya.to...@intel.com>

       PR middle-end/62120
       * varasm.c (decode_reg_name_and_count): Check availability for
       registers from ADDITIONAL_REGISTER_NAMES.

testsuite/
2014-09-30  Ilya Tocar  <ilya.to...@intel.com>

       PR middle-end/62120
       * gcc.target/i386/avx512f-additional-reg-names.c: Use register valid
       in 32-bit mode.
       * gcc.target/i386/pr62120.c: New.


Added:
    trunk/gcc/testsuite/gcc.target/i386/pr62120.c
Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/testsuite/ChangeLog
    trunk/gcc/testsuite/gcc.target/i386/avx512f-additional-reg-names.c
    trunk/gcc/varasm.c