https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63351
Richard Biener <rguenth at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Keywords| |missed-optimization
Target| |x86_64-*-*, i?86-*-*
Status|UNCONFIRMED |NEW
Last reconfirmed| |2014-09-24
Component|c |target
Ever confirmed|0 |1
--- Comment #1 from Richard Biener <rguenth at gcc dot gnu.org> ---
Interesting - so AVX512 allows all(?) source operands to be scalars (in
vector registers)?
In theory combine should be able to handle this if the backend provides
proper patterns. But I see that _mm512_set1_epi32 expands to sth like
;; _7 = __builtin_ia32_pbroadcastd512_gpr_mask (b_1(D), _6, -1);
(insn 7 6 8 (set (reg:SI 101)
(reg/v:SI 99 [ b ])) ./include/avx512fintrin.h:3566 -1
(nil))
(insn 8 7 9 (set (reg:V16SI 102)
(subreg:V16SI (reg/v:V8DI 83 [ __Y ]) 0))
./include/avx512fintrin.h:3566 -1
(nil))
(insn 9 8 10 (set (reg:HI 103)
(const_int -1 [0xffffffffffffffff])) ./include/avx512fintrin.h:3566 -1
(nil))
(insn 10 9 11 (set (reg:V16SI 100)
(vec_merge:V16SI (vec_duplicate:V16SI (reg:SI 101))
(reg:V16SI 102)
(reg:HI 103))) ./include/avx512fintrin.h:3566 -1
(nil))
(insn 11 10 0 (set (reg:V16SI 85 [ D.15281 ])
(reg:V16SI 100)) ./include/avx512fintrin.h:3566 -1
(nil))
which looks really awkward - or even bogus (insn 10). What's the semantics
of _mm512_set1_epi32?
It seems that all of the intrinsics expand to sth weird as the above
(the vec_merge), even _mm512_add_epi32.
I'm quite sure this doesn't make the combiners job easier.
