[Bug target/62180] (RX600) - compiler doesn't honor -fstrict-volatile-bitfields and generates incorrect machine code for I/O register access

[jan.capek at braiins dot cz]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62180

--- Comment #5 from Jan Čapek <jan.capek at braiins dot cz> ---
(In reply to DJ Delorie from comment #4)
> Perhaps you need this patch:
> 
> https://gcc.gnu.org/ml/gcc-patches/2014-06/msg00993.html

DJ Delorie,

you are the man! The patch works as expected. Interestingly, the compiler now
honors the bitfield sizes even without explicitely specifying this options. The
resulting machine code output is:

        .file   "test.c"
        .section P,"ax"
        .global _test
        .type   _test, @function
_test:
        pushm   r6-r11
        add     #-4, r0, r6
        mov.L   r6, r0
        mov.L   r1, [r6]
        mov.L   [r6], r10
        mov.W   [r10], r11 ; YES, read the entire register
        or      #64, r11
        mov.W   r11, [r10] ; YES, write the entire register
        rtsd    #28, r6-r11
        .size   _test, .-_test
        .ident  "GCC: (GNU) 4.9.0"


I have checked the 4.9 official branch and it still has not been included will
it go to the trunk/master branch?

Thanks again,

Jan