https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61298
Bug ID: 61298
Summary: redundant compare instructions for powerpc64
Product: gcc
Version: 4.10.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: carrot at google dot com
Target: powerpc64le
Compile the following source code with options -m64 -mvsx -mcpu=power8 -O2
typedef unsigned char Bool;
typedef unsigned char UChar;
typedef unsigned int UInt32;
typedef unsigned short UInt16;
Bool compare( UInt32 i1, UInt32 i2, UChar* p)
{
UChar c1, c2;
c1 = p[i1]; c2 = p[i2];
if (c1 != c2) return (c1 > c2);
i1++; i2++;
c1 = p[i1]; c2 = p[i2];
if (c1 != c2) return (c1 > c2);
i1++; i2++;
c1 = p[i1]; c2 = p[i2];
if (c1 != c2) return (c1 > c2);
return ((Bool)0);
}
Trunk gcc generates:
compare:
lbzx 9,5,3
lbzx 10,5,4
cmpw 7,9,10 // A
beq 7,.L8
.L6:
cmplw 7,9,10 // B
mfcr 3,1
rlwinm 3,3,30,1
blr
.p2align 4,,15
.L8:
addi 9,3,1
addi 10,4,1
rldicl 9,9,0,32
rldicl 10,10,0,32
lbzx 9,5,9
lbzx 10,5,10
cmpw 7,9,10 // C
bne 7,.L6
addi 3,3,2
addi 4,4,2
rldicl 3,3,0,32
rldicl 4,4,0,32
lbzx 9,5,3
lbzx 3,5,4
cmpw 7,9,3 // X
beq 7,.L5
cmplw 7,9,3 // Y
mfcr 3,1
rlwinm 3,3,30,1
blr
.p2align 4,,15
.L5:
li 3,0
blr
Instruction X is used to compare equal, so it can be replaced by cmplw, same as
instruction Y, then instruction Y can be removed.
Similarly instructions AC can be replaced by cmplw, then instruction B can be
removed.
GCC 4.9 generates similar code.
GCC 4.8 can generate optimal code without the redundant compare instructions.
