http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60839
Sebastian Huber <sebastian.hu...@embedded-brains.de> changed:
What |Removed |Added
----------------------------------------------------------------------------
Target| |powerpc-rtems4.11
CC| |meissner at linux dot
vnet.ibm.com
| |,
| |wschmidt at linux dot
vnet.ibm.com
Known to work| |4.8.2
Known to fail| |4.8.3, 4.9.0
--- Comment #1 from Sebastian Huber <sebastian.hu...@embedded-brains.de> ---
A git bisect showed that this is the commit that breaks the GCC build:
66c7a00630e9445ac478dfa1bd6ce900bf6cd55e is the first bad commit
commit 66c7a00630e9445ac478dfa1bd6ce900bf6cd55e
Author: wschmidt <wschmidt@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Fri Apr 4 15:14:01 2014 +0000
[gcc]
2014-04-04 Bill Schmidt <wschm...@linux.vnet.ibm.com>
Back port mainline subversion id 209025.
2014-04-02 Michael Meissner <meiss...@linux.vnet.ibm.com>
PR target/60735
* config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): If we have
software floating point or no floating point registers, do not
allow any type in the FPRs. Eliminate a test for SPE SIMD types
in GPRs that occurs after we tested for GPRs that would never be
true.
* config/rs6000/rs6000.md (mov<mode>_softfloat32, FMOVE64):
Rewrite tests to use TARGET_DOUBLE_FLOAT and TARGET_E500_DOUBLE,
since the FMOVE64 type is DFmode/DDmode. If TARGET_E500_DOUBLE,
specifically allow DDmode, since that does not use the SPE SIMD
instructions.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_8-branch@209116
138bc75d-0d04-0410-961f-82ee72b054a4
:040000 040000 3d009a9aa1e94d5aaf9c697401c810e32bd06138
7f587451ff81b62bc286b06faff08b80383ab166 M gcc
