http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60735
--- Comment #1 from Michael Meissner <meissner at gcc dot gnu.org> --- Created attachment 32520 --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=32520&action=edit Proposed patch to fix the problem The issue is there was no insn to support movdd if -mspe. I fixed the code to provide the insn for 32-bit moves. In looking at the code, there were some thinkos in that the moves for DFmode and DDmode where testing TARGET_SINGLE_FLOAT and TARGET_E500_SINGLE, when these types are double. In addition, I disabled the FPRs being considered available if software floating point or floating point is not done in FPRS (i.e. spe).
