[Bug target/59401] New: [SH] GBR addressing mode optimization produces wrong code

[olegendo at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59401

            Bug ID: 59401
           Summary: [SH] GBR addressing mode optimization produces wrong
                    code
           Product: gcc
           Version: 4.9.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: olegendo at gcc dot gnu.org
            Target: sh*-*-*

The GBR addressing mode optimization which was added in 4.8 is buggy.
The following example:

struct tcb_t
{
  int x, y, z, w;
};

int test_00 (int a, tcb_t* b)
{
  tcb_t* tcb = (a & 5) ? (tcb_t*)__builtin_thread_pointer () : b;

  return tcb->w + tcb->x;
}

compiled with -O2 results in:

        mov.l   @(12,gbr),r0
        mov     r0,r2
        mov.l   @(0,gbr),r0
        rts
        add     r2,r0

which is obviously wrong code.  This is because sh_find_base_reg_disp in sh.c
will step insns outside the current basic block without any further
considerations.  This is only OK to do if the predecessor basic block has a
fall through edge to the current basic block (i.e. there are no labels in
between).  Otherwise the address reg in question might be set in multiple basic
blocks which must be analyzed.
In the above test case GBR addressing modes can't be used actually.