http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58662

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|ASSIGNED                    |NEW
          Component|tree-optimization           |rtl-optimization
           Assignee|rguenth at gcc dot gnu.org         |unassigned at gcc dot 
gnu.org
            Summary|wrong code at -O2 and -O3   |[4.9 Regression] wrong code
                   |on x86_64-linux-gnu (in     |at -O2 and -O3 on
                   |64-bit mode)                |x86_64-linux-gnu (in 64-bit
                   |                            |mode)

--- Comment #6 from Richard Biener <rguenth at gcc dot gnu.org> ---
Doesn't fail with -O2 -fno-tree-vrp.

The uncprop transform is correct.

  _7 = _12 % 14;
  if (_7 != 0)
    goto <bb 3>;
  else
    goto <bb 7>;

  <bb 7>:
  goto <bb 4>;

  <bb 3>:
  c.4_9 = c;
  _8 = c.4_9 != 0;
  _13 = (int) _8;

  <bb 4>:
  iftmp.3_1 = PHI <_7(7), _13(3)>

we know that _7 is zero on the edge from BB 7.

What we now do is coalesce iftmp.3_1 with both _7 and _13 with also seems
correct.  The initial RTL generated looks ok as well:

(insn 25 24 26 2 (parallel [
            (set (reg:SI 83 [ D.1762 ])
                (minus:SI (reg:SI 90 [ D.1762 ])
                    (reg:SI 106)))
            (clobber (reg:CC 17 flags))
        ]) t.c:17 296 {*subsi_1}
     (nil))
(insn 26 25 27 2 (set (reg:CCZ 17 flags)
        (compare:CCZ (reg:SI 83 [ D.1762 ])
            (const_int 0 [0]))) t.c:18 3 {*cmpsi_ccno_1}
     (nil))
(jump_insn 27 26 28 2 (set (pc)
        (if_then_else (eq (reg:CCZ 17 flags)
                (const_int 0 [0]))
            (label_ref 33)
            (pc))) t.c:18 616 {*jcc_1}
     (int_list:REG_BR_PROB 5000 (nil))
 -> 33)

;;  succ:       4 [50.0%]  (FALLTHRU)
;;              5 [50.0%]

;; basic block 4, loop depth 0, count 0, freq 5000
;;  prev block 2, next block 5, flags: (NEW, REACHABLE, RTL)
;;  pred:       2 [50.0%]  (FALLTHRU)
...
(insn 32 31 33 4 (set (reg:SI 83 [ D.1762 ])
        (reg:SI 107 [ D.1763 ])) t.c:18 86 {*movsi_internal}
     (nil))
;;  succ:       5 [100.0%]  (FALLTHRU)

;; basic block 5, loop depth 0, count 0, freq 10000, maybe hot
;;  prev block 4, next block 6, flags: (NEW, REACHABLE, RTL)
;;  pred:       2 [50.0%]
;;              4 [100.0%]  (FALLTHRU)
(code_label 33 32 34 5 2 "" [1 uses])
(note 34 33 35 5 [bb 5] NOTE_INSN_BASIC_BLOCK)
(insn 35 34 36 5 (set (mem/v/c:SI (symbol_ref:DI ("b")  <var_decl
0x7fc8088581c8 b>) [2 b+0 S4 A32])
        (reg:SI 83 [ D.1762 ])) t.c:18 86 {*movsi_internal}
     (nil))

it is combine where mysteriously all defining instructions for reg:SI 83
vanish.  Not mine.

Reply via email to