http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58461
--- Comment #3 from Matthew Fortune <matthew.fortune at imgtec dot com> --- (In reply to rsand...@gcc.gnu.org from comment #2) > I think it'd be wrong for the backend to say that moves between > MIPS16 registers and other general registers are more expensive > than memory though. I'm not surprised by that comment. I agree. It was just an option I found that avoided the need for changes to IRA. > But of course, although the moves are cheap, registers other than > $2-$7, $16, $17 and $24 are only useful as spill space. So if > it's better for IRA to ignore them and LRA to use them via > TARGET_SPILL_CLASS, perhaps we should enforce that directly, > by hiding other registers from IRA. I suppose that's like > restoring the old cover classes hook, but only as an optional > feature. One of the problems here is that IRA is coming up with M16_REGS as the preferred class and GR_REGS as the alternate class for most pseudos. If there is no cover class to translate GR_REGS into then that seems like a problem unless it would work to use M16_REGS as a cover class for GR_REGS. My initial attempt at this problem was to stop IRA from using the superunion of preferred and alternate classes for an allocno and instead just using the preferred class. This has the same effect as the change to register move costs which was to get the alternate class to be NO_REGS (or ignored). > I realise this isn't the point of the bug report or the attachment, > but just FWIW: the constraints shouldn't be matching the fake > FRAME_POINTER_REGNUM. They should wait for it to be eliminated > to either STACK_POINTER_REGNUM or HARD_FRAME_POINTER_REGNUM and > match that. I'll look at that when putting an 'enable LRA' patch together. There's lots of testing to do yet.
