http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56131



vries at gcc dot gnu.org changed:



           What    |Removed                     |Added

----------------------------------------------------------------------------

                 CC|                            |dant at picochip dot com



--- Comment #18 from vries at gcc dot gnu.org 2013-02-25 09:30:25 UTC ---

> Does that fix both this PR and the PR56242 regression?



PR56242 happens when we're deleting an undeletable label (i.e. turning it into

an deleted label note) and reordering that note in an insn stream with

SEQUENCEs. This fix makes sure that the reordering is done only when we have a

CFG.



PR56242 has been reported for hppa. For that target, the CFG is not recomputed

in pass_machine_reorg (For all targets, the CFG is freed before

pass_machine_reorg). That means that the fix has the effect that PR56242 won't

trigger any more on hppa.



The more general question then is whether there are targets that both have

sequences and have a CFG at the same time.



I'll make an attempt at answering this question.



For all these targets, we recompute the CFG at the start of pass_machine_reorg:

...

$ egrep '(compute|free)_bb_for_insn' gcc/config/*/*

gcc/config/arm/arm.c:  compute_bb_for_insn ();

gcc/config/bfin/bfin.c:  compute_bb_for_insn ();

gcc/config/c6x/c6x.c:  compute_bb_for_insn ();

gcc/config/frv/frv.c:  compute_bb_for_insn ();

gcc/config/i386/i386.c:  compute_bb_for_insn ();

gcc/config/ia64/ia64.c:  compute_bb_for_insn ();

gcc/config/mep/mep.c:  compute_bb_for_insn ();

gcc/config/mips/mips.c:    compute_bb_for_insn ();

gcc/config/mips/mips.c:      free_bb_for_insn ();

gcc/config/mn10300/mn10300.c:  compute_bb_for_insn ();

gcc/config/picochip/picochip.c:  compute_bb_for_insn ();

gcc/config/spu/spu.c:      compute_bb_for_insn ();

gcc/config/spu/spu.c:      free_bb_for_insn ();

gcc/config/spu/spu.c:  compute_bb_for_insn ();

gcc/config/spu/spu.c:  free_bb_for_insn ();

gcc/config/tilegx/tilegx.c:  compute_bb_for_insn ();

gcc/config/tilepro/tilepro.c:  compute_bb_for_insn ();

...

For mips, that is only briefly, before any SEQUENCE is created. For spu, it's

during the whole of pass_machine_reorg, but not after.



These targets can have sequences (disregarding frv because they're all in

comments):

...

$ egrep -c 'define_delay' gcc/config/*/* | egrep -v ':0|frv'

gcc/config/cris/cris.md:3

gcc/config/fr30/fr30.md:1

gcc/config/h8300/h8300.md:1

gcc/config/iq2000/iq2000.md:3

gcc/config/microblaze/microblaze.md:1

gcc/config/mips/mips.md:4

gcc/config/pa/pa.md:7

gcc/config/picochip/picochip.md:1

gcc/config/sh/sh.md:4

gcc/config/sparc/sparc.md:5

...



Looking for targets that occur in both lists (and ignoring mips) I find only

picochip. So, AFAIU, PR56242 might still trigger for picochip.

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