http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56309
--- Comment #9 from arturomdn at gmail dot com 2013-02-14 16:00:49 UTC --- I found in the Intel optimization guide an example of this idiom of comparing once and issuing two cmov back-to-back... so the problem isn't the two cmov, but possibly introducing the 2nd compare that splits them. not_equal: movzx eax, BYTE PTR[esi+edx] movzx edx, BYTE PTR[edi+edx] cmp eax, edx cmova eax, ONE cmovb eax, NEG_ONE jmp ret_tag Taken from example 10-16 of http://www.intel.com/content/dam/doc/manual/64-ia-32-architectures-optimization-manual.pdf