http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55583
Bug #: 55583 Summary: Extended shift instruction on x86-64 is not used, producing unoptimal code Classification: Unclassified Product: gcc Version: 4.8.0 Status: UNCONFIRMED Severity: enhancement Priority: P3 Component: rtl-optimization AssignedTo: unassig...@gcc.gnu.org ReportedBy: mtkilpai...@torni.org Created attachment 28866 --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=28866 Source code demonstrating bad code generation On x86-64, extended shift instruction is not generated for some reason. Combined with other problems this creates very bad code. Test functions included for signed and unsigned 16,32,64-bit types for both left and right shifts and for constant n and function parameter n. Code of this form: unsigned int a, b; const int n = 2; void test32l (void) { b = (b << n) | (a >> (32 - n)); } expected code: mov a(%rip),%eax shld $0x2,%eax,b(%rip) ret produced code: mov b(%rip), %edx ; Size of register used here depends on gcc version mov a(%rip), %eax ; Size of register used here depends on gcc version sal $2, %edx ; Size of register used here depends on gcc version shr $25, %eax or %edx, %eax mov %eax, b(%rip) ret Tested with: COLLECT_GCC_OPTIONS='-v' '-c' '-save-temps' '-O2' '-Wall' '-W' '-o' 'gcc_shld_not_used' '-mtune=generic' I tried gcc versions: GNU C (Debian 4.7.2-4) version 4.7.2 (x86_64-linux-gnu) GNU C (Debian 4.6.3-11) version 4.6.3 (x86_64-linux-gnu) GNU C (Debian 4.5.3-9) version 4.5.3 (x86_64-linux-gnu) GNU C (Debian 4.4.7-2) version 4.4.7 (x86_64-linux-gnu) GNU C (GCC) version 4.8.0 20121203 (experimental) [trunk revision 194106] (x86_64-unknown-linux-gnu) All produce the same code modulo register size differences mentioned above. gcc HEAD changes sal to leal (,%rcx,4),%eax