http://gcc.gnu.org/bugzilla/show_bug.cgi?id=31557
--- Comment #4 from Paul H. Hargrove <PHHargrove at lbl dot gov> 2012-08-14
00:31:14 UTC ---
(In reply to comment #3)
> FWIW, 4.8.0 20120809 w/ -O1 or higher is now using just 4 instructions instead
> of 5. So, "half way there".
>
>
> .L.f:
> lis 3,0x8000
> ori 3,3,1
> rldicl 3,3,0,32
> blr
That was for a 64-bit target, where the need to zero the upper half of r3
(which is 0xffffffff due to sign extension of 0x8000 by 'lis') accounts for the
4th instruction. So, there is still room for improvement using the originally
proposed 3-instruction sequence (since 'oris' won't sign-extend as 'lis' does).
For a 32-bit target, it appears that GCC 4.8.0 20120809 has reached the desired
three instructions:
f:
lis 3,0x8000
ori 3,3,1
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