http://gcc.gnu.org/bugzilla/show_bug.cgi?id=52628
Bug #: 52628
Summary: SH Target: Inefficient shift by T bit result
Classification: Unclassified
Product: gcc
Version: 4.8.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
AssignedTo: [email protected]
ReportedBy: [email protected]
Target: sh*-*-*
int test_01 (int a, int b, int c)
{
return c << (a > b ? 1 : 0);
}
-m4 -O2:
cmp/gt r5,r4
mov r6,r0
movt r1
rts
shld r1,r0
better:
cmp/gt r5,r4
bf 0f
add r6,r6 ! do not use shll because of T bit usage in shll
0:
rts
mov r6,r0
int test_02 (int a, int b, int c)
{
return c << (a > b ? 2 : 0);
}
-m4 -O2:
cmp/gt r5,r4
mov r6,r0
movt r1
add r1,r1
rts
shld r1,r0
better:
cmp/gt r5,r4
bf 0f
shll2 r6
0:
rts
mov r6,r0
The same goes for other shift amounts like 8 and 16.
On SH4 the zero-displacement conditional branch code should be faster.
