http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50176
--- Comment #9 from Vladimir Makarov <vmakarov at redhat dot com> 2011-12-13 20:04:04 UTC --- (In reply to comment #0) > Created attachment 25088 [details] > > > After expanding 4.7 contains: > > (insn 52 51 53 6 (set (reg:QI 83 [ D.2723 ]) > (mem:QI (plus:SI (reg/v/f:SI 75 [ inptr1 ]) > (reg/v:SI 117 [ col ])) [0 MEM[base: inptr1_19, index: col_90, > offset: 0B]+0 S1 A8])) test_4_6.c:42 -1 > (nil)) > > and 4.6 contains > > (insn 52 51 53 6 (parallel [ > (set (reg/v:SI 86 [ cb ]) > (zero_extend:SI (mem:QI (plus:SI (reg/v/f:SI 76 [ inptr1 ]) > (reg/v:SI 78 [ col ])) [0 MEM[base: inptr1_19, > index: col_22, offset: 0B]+0 S1 A8]))) > (clobber (reg:CC 17 flags)) > ]) test_4_6.c:42 -1 > (nil)) > > The reason of different outcome in RA is that p83 generated by 4.7 we can use only q regs vs. general regs for p86 generated by 4.6. It decreases # of possible hard regs for p83 in two times and failure to assign p83 a hard register. More accurately IRA assigns dx to p83 then reload spills p83 because it needs a hard register then reload asks IRA to reassign a hard register to p83 and IRA fails.
