[Bug rtl-optimization/51374] [avr] insn combine reorders volatile memory accesses

[gjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=51374

--- Comment #3 from Georg-Johann Lay <gjl at gcc dot gnu.org> 2011-12-01 
10:08:05 UTC ---
ALso notice, that with the following test case that reads status *after* data

typedef unsigned char uint8_t;

void __vector_18(void)
{
    unsigned char data = (*(volatile uint8_t *)((0x0C) + 0x20));
    unsigned char status = (*(volatile uint8_t *)((0x0B) + 0x20));
    static int slot;

    if (status & 0x10)
    {
        if (slot == (-2))
        {
            slot ++;
        }
    }
}


then *no* SBIS/SBIC instruction is produced:

__vector_18:
    in r24,0xc     ;  6    movqi_insn/4    [length = 1]
    in r24,0xb     ;  8    movqi_insn/4    [length = 1]
    sbrs r24,4     ;  11    *sbrx_branchqi    [length = 2]
    rjmp .L1
...

and combine says:

Trying 9, 10 -> 11:
Successfully matched this instruction:
(set (pc)
    (if_then_else (eq (zero_extract:QI (reg/v:QI 44 [ status ])
                (const_int 1 [0x1])
                (const_int 4 [0x4]))
            (const_int 0 [0]))
        (label_ref:HI 21)
        (pc)))
deferring deletion of insn with uid = 10.
deferring deletion of insn with uid = 9.
modifying insn i3    11 pc={(zero_extract(r44:QI,0x1,0x4)==0)?L21:pc}
      REG_DEAD: r44:QI
      REG_BR_PROB: 0xf3c
deferring rescan insn with uid = 11.

Trying 8 -> 11:
Failed to match this instruction:
(set (pc)
    (if_then_else (eq (zero_extract:QI (mem/v:QI (const_int 43 [0x2b]) [0
MEM[(volatile uint8_t *)43B]+0 S1 A8])
                (const_int 1 [0x1])
                (const_int 4 [0x4]))
            (const_int 0 [0]))
        (label_ref:HI 21)
        (pc)))