http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50891
--- Comment #2 from H.J. Lu <hjl.tools at gmail dot com> 2011-10-27 23:20:47
UTC ---
Does this:
---
diff --git a/gcc/postreload.c b/gcc/postreload.c
index 0e50d85..526015b 100644
--- a/gcc/postreload.c
+++ b/gcc/postreload.c
@@ -2039,6 +2039,10 @@ reload_cse_move2add (rtx first)
allocation if possible. */
&& SCALAR_INT_MODE_P (GET_MODE (XEXP (cnd, 0)))
&& hard_regno_nregs[REGNO (XEXP (cnd, 0))][GET_MODE (XEXP (cnd, 0))]
== 1
+ /* Use implicit set only if the new mode is wider than
+ the previous mode since register isn't really set. */
+ && (GET_MODE_SIZE (GET_MODE (XEXP (cnd, 0)))
+ >= GET_MODE_SIZE (reg_mode[REGNO (XEXP (cnd, 0))]))
&& CONST_INT_P (XEXP (cnd, 1)))
{
rtx implicit_set =
---
make any senses?
