http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48068
Summary: loongson intrinsics improvement opportunities
Product: gcc
Version: 4.6.0
Status: UNCONFIRMED
Keywords: missed-optimization
Severity: enhancement
Priority: P3
Component: target
AssignedTo: [email protected]
ReportedBy: [email protected]
Target: mipsel-unknown-linux-gnu, mips64el-unknown-linux-gnu
Created attachment 23621
--> http://gcc.gnu.org/bugzilla/attachment.cgi?id=23621
Code showing the three mentioned shortcomings
While writing a Loongson-2E / -2F backend for RAPP,
http://savannah.nongnu.org/projects/rapp/ using gcc52 at the compilefarm I
noticed a few omissions and opportunities for improvements. I just thought
adding some notes here would be better than nothing.
1. Lack of trivial logical operators on vector types.
There are insns for "or", shifts (the whole vector), xor, orn, and "and" that
can operate directly on the vector registers (the floating point registers),
but there are neither builtins for those operations nor do operations on the
types use the vector registers; attempts generate code that uses regular insns
and general registers. Looking in the loongson+mips code shows that there's no
support for them. I had to resort to asms in the port file,
http://git.savannah.gnu.org/cgit/rapp.git/tree/compute/backend/rc_vec_loongson2ef.h
for reference.
2. The pshufh_u and pshufh_s builtins have a spurious unused first operand
(a confusion regarding operand 0 obvious by reading loongson.md).
I understand removing the argument to the intrinsic would break the intrinsics
API, but a corrected intrinsic could be added by a different name or be
requested by a new option, avoiding the extra instructions initializing this
destination-only register caused by specifying it also as an input.
3. Normal scalar operations on 64-bit integers are supported by the ISA
operating on integer contents in the floating-point registers, but lacking
support in the port, except through explicit use through paddd/psubd/pmuluw
intrinsics. The "clash with mips.md::add<mode>3"-type issues can be solved by
merging these into the normal insn patterns and adding alternatives using
constraints that match only when the loongson vector support is enabled.
(Though I understand maintainer hesitation adding support for everyones
COP2-integer extensions into the regular insns.)
FWIW, I used the ISA documentation at
http://loongson-dev.googlegroups.com/web/Loongson2FUserGuide.pdf
I'll add a few examples.
