http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43653
--- Comment #10 from Uros Bizjak <ubizjak at gmail dot com> 2011-02-15 22:41:40
UTC ---
(In reply to comment #9)
> I think an x86 maintainer is going to need to take a look at this.
> Which simply isn't going to work and it's all downhill from there, including a
> surprise secondary memory allocation which ultimately triggers the ICE.
>
> I was able to hack things to work by enabling a secondary reload when copying
> (plus (sp) (whatever)) into SSE_REGS, but that may not be the best solution.
> Someone with more x86 internal knowledge should look at this.
Hm, indeed. SSE can't handle non-vector PLUS insn, so reload needs a bit of
help.
Following patch fixes the testcase:
Index: i386.c
===================================================================
--- i386.c (revision 170189)
+++ i386.c (working copy)
@@ -28313,6 +28313,11 @@ ix86_secondary_reload (bool in_p, rtx x,
return Q_REGS;
}
+ if (in_p && GET_CODE (x) == PLUS
+ && !VECTOR_MODE_P (mode)
+ && rclass == SSE_REGS)
+ return GENERAL_REGS;
+
return NO_REGS;
}
And generates:
movq .LC1(%rip), %rax
leaq (%rsp,%rax), %rax
movq %rax, -112(%rsp)
movq -112(%rsp), %xmm1
punpcklqdq %xmm1, %xmm1
