http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47477
--- Comment #3 from Jakub Jelinek <jakub at gcc dot gnu.org> 2011-01-27
17:21:04 UTC ---
Not so easily, addsi3_cc is quite specialized pattern and if we add peepholes
to help with reg1 = reg1 op reg2; reg2 = reg1 [reg1 DEAD];
I think we'd add it only for a couple of most common arithmetics ops.
Wonder whether the splitters couldn't be smarter here, when splitting a
doubleword addition see that we only care about a SImode subreg thereof.
Or, if lower-subreg.c could do something about it, optimize
(insn 10 9 11 2 (parallel [
(set (reg:DI 74)
(plus:DI (reg:DI 71)
(reg:DI 73)))
(clobber (reg:CC 17 flags))
]) pr47477.c:4 243 {*adddi3_doubleword}
(nil))
(insn 11 10 12 2 (set (reg:SI 70)
(subreg:SI (reg:DI 74) 0)) pr47477.c:5 64 {*movsi_internal}
(nil))
into just SImode addition.
