[Bug rtl-optimization/45472] [4.5/4.6 Regression] ICE: in move_op_ascend, at sel-sched.c:6124 with -fselective-scheduling2

[abel at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45472

--- Comment #14 from Andrey Belevantsev <abel at gcc dot gnu.org> 2011-01-13 
10:04:18 UTC ---
Do we want at least the patch properly merging the volatile bits in the
scheduler for 4.6?  Or is this better be s plain ICE instead of a silent
miscompile?