http://gcc.gnu.org/bugzilla/show_bug.cgi?id=41082
Jakub Jelinek <jakub at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Component|middle-end |target
--- Comment #62 from Jakub Jelinek <jakub at gcc dot gnu.org> 2010-12-07
23:18:05 UTC ---
On a closer look, the reason why DSE deletes it is because there is a stvewx
insn in between, and the pattern of the insn is just plain wrong.
rs6000_expand_vector_extract has called assign_stack_temp, which gave for a
V4SImode something that is at r1+256, 16 bytes.
But rs6000_expand_vector_extract adjusts the address by elt * 4 bytes, here for
elt 3, so it is r1+268. The pattern wrongly says that a V4SImode register is
stored into (mem:V4SI (r1 + 268)), which is not true (the insn stores just
4 bytes, i.e. SImode, into r1 + 268. The r1+272 address which was given for
one of the spilled CCmode pseudos is then considered to be clobbered by DSE,
because
(mem:V4SI (r1 + 268)) overlaps it, thus the removed (mem:CC (r1 + 272)) store
by DSE.
I think the stve* insns need to be represented as what it really does, i.e.
(set (mem:SI ...) (either vec_select or perhaps unspec with the V4SImode reg
inside of it)).
