http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46470
Summary: "add $0x8,%rsp" no longer optimized to pop
Product: gcc
Version: 4.5.3
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
AssignedTo: unassig...@gcc.gnu.org
ReportedBy: hubi...@gcc.gnu.org
Created attachment 22390
--> http://gcc.gnu.org/bugzilla/attachment.cgi?id=22390
preprocessed testcase.
This is another cause of CSiBE regression at x86_64.
Mainline produces:
00000000000000f4 <yyerror>:
f4: 48 83 ec 08 sub $0x8,%rsp
f8: 48 89 fa mov %rdi,%rdx
fb: 48 8b 3d 00 00 00 00 mov 0x0(%rip),%rdi # 102
<yyerror+0xe>
102: be 00 00 00 00 mov $0x0,%esi
107: 31 c0 xor %eax,%eax
109: e8 00 00 00 00 callq 10e <yyerror+0x1a>
10e: 31 c0 xor %eax,%eax
110: 48 83 c4 08 add $0x8,%rsp
114: c3 retq
GCC 4.3 produces:
52: 48 83 ec 08 sub $0x8,%rsp
56: 48 89 fa mov %rdi,%rdx
59: 48 8b 3d 00 00 00 00 mov 0x0(%rip),%rdi # 60 <yyerror+0xe>
60: be 00 00 00 00 mov $0x0,%esi
65: 31 c0 xor %eax,%eax
67: e8 00 00 00 00 callq 6c <yyerror+0x1a>
6c: 31 c0 xor %eax,%eax
6e: 5a pop %rdx
6f: c3 retq
This is because CFA_ADJUST_CFA reg note is in the way now.
Richard, I think this is result of your changes, what would be best way to
handle this? I guess peephole2 can just move the note when it translates one
intstruction to one instruction. This however breaks because we want to split
up to 3 pops when doing -Os.
I guess also the epilogue code can just emit the pops directly. There always
should be free register available at this time.
