------- Comment #2 from opod at nic-nac-project dot org 2010-08-24 18:58 ------- (In reply to comment #1) The processor clearly supports SSE3 so perhaps -march=prescott would be better instead of -march=pentium-m. I also assumed that -march=pentium-m implies -mfpmath=387 but it does not seem to apply (or matter). Finally, -march=native on my laptop picks up L1 and L2 cache sizes as --params which does not happen for the VIA C7. Just for reference, it is reported as
Cache info L1 Instruction cache: 64KB, 4-way associative, 1 lines per tag, line size=64 bytes. L1 Data cache: 64KB 4-way associative, 1 lines per tag, line size=64 bytes. L2 (on CPU) cache: 128KB 10-way associative, 1 lines per tag, line size=64 bytes. HTH -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45359
