------- Comment #18 from uweigand at gcc dot gnu dot org 2010-08-02 19:25 ------- (In reply to comment #17) > Someone might want to try this again after the fix for PR 38582.
It's a lot better, but still not real good. I'm now seeing on a QS22 (ppu -> spu cross compiler): -O0: 0m9.983s -O1: 4m7.801s -O2: 35m10.236s -O3: 36m7.059s However, the culprit clearly is no longer register renaming, which is now down to 5 seconds in the worst case. For -O1, the by far slowest pass is dead store elimination: dead store elim1 : 101.02 (41%) usr 0.62 (35%) sys 101.65 (41%) wall 4307 kB ( 7%) ggc dead store elim2 : 105.03 (43%) usr 0.65 (37%) sys 105.69 (43%) wall 3028 kB ( 5%) ggc For -O2 and -O3, the by far slowest pass is register allocation: integrated RA :1485.83 (71%) usr 15.86 (68%) sys1501.87 (71%) wall 2486 kB ( 2%) ggc reload : 157.93 ( 8%) usr 1.97 ( 8%) sys 159.92 ( 8%) wall 30178 kB (19%) ggc reload CSE regs : 100.05 ( 5%) usr 1.45 ( 6%) sys 101.51 ( 5%) wall 12556 kB ( 8%) ggc Scheduling only takes about 2 min in either case. -- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=31850
