This program is written for AT91SAM9260.
It is on compiled with yagarto with GCC 4.5.0.
on win xp sp2.
The prog reads 10 dwords from
address 0 and sends them through uart.
Adress 0 (on '9260) can either be ROM or SRAM,
depending on REMAP settings.
The prog first does a REMAP, then reads 10 dwords.
However, generated code first reads ptr[0],
does REMAP, then reads ptr[1-9], which means
that the first dword will be read from ROM,
and all others from SRAM.
"MATRIX_MRCR" is volatile, so it should be
executed first, IMHO.
It can be fixed by:
1. add volatile to ptr definition (line 31).
2. instead of linking with libarm.a,
change lines 7 (#if 1) and 40 (SendDword2).
This method, however, produces less readable LSS file.
I've included two LSS files: original.lss and method2.lss
Original.lss is generated with the "as is" src.c.
Methot2.lss is generated after changing lines 7 & 40.
--
Summary: Out-of-order execution
Product: gcc
Version: 4.5.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: c
AssignedTo: unassigned at gcc dot gnu dot org
ReportedBy: aleksazr at gmail dot com
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45127
