------- Comment #7 from rearnsha at gcc dot gnu dot org 2010-02-08 11:26
-------
(In reply to comment #6)
> Does the ARM backend already support conditional compares?
>
Yes, but only by manipulating store-flag sequences in the combine pass. That's
a poor-man's implementation and it can lead to some sequences that don't get
fully simplified.
That code could be compiled to
ldrb r3, [r4, #-4] @ zero_extendqisi2
cmp r3, #97
ldrbeq r3, [r4, #-3] @ zero_extendqisi2
cmpeq r3, #98
ldrbeq r3, [r4, #-2] @ zero_extendqisi2
cmpeq r3, #99
ldrbeq r3, [r4, #-1] @ zero_extendqisi2
cmpeq r3, #100
but the compiler currently has no chance of achieving that.
--
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=11831
