------- Comment #9 from rearnsha at gcc dot gnu dot org 2010-02-04 11:11
-------
(In reply to comment #8)
> ldr r2, [r1, #0]
> mul r3, r2, r0
> str r3, [r1], #4
> ldr r2, [r1, #0]
> mul r3, r2, r0
> str r3, [r1], #4
> ldr r2, [r1, #0]
[...]
Ug, on a dual-issue core with load delay slots that code will REALLY suck.
there's almost nothing that can be dual issued and the loaded values are used
in the instruction immediately after the load.
--
rearnsha at gcc dot gnu dot org changed:
What |Removed |Added
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CC| |rearnsha at gcc dot gnu dot
| |org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=36712
