------- Comment #9 from ramana at gcc dot gnu dot org 2010-01-15 09:05 -------
(In reply to comment #8)
Hi Mark,
Many thanks for looking into this.
> However, if this is behaving different on ARM from (say) x86, I think that
> the ABI is a likely
> cause because, as you say, the C++ ABI for these bits is subtly different. Do
> we know that this is ARM-specific?
I've compared this with the mips port and the x86 port and in both cases the
first bit where there is a difference is after lowering into gimple - i.e there
is no address calculation like this sequence that comes in the ARM port.
D.1844_3 = (unsigned int *) D.1824_2;
D.1845_4 = D.1844_3 + 4;
D.1846_5 = D.1845_4 + -4;
So yes it does look ARM specific . Also peeking at results on gcc-testresults
doesn't show this failure on x86.
cheers
Ramana
--
ramana at gcc dot gnu dot org changed:
What |Removed |Added
----------------------------------------------------------------------------
Known to fail|4.5.0 |4.4.2 4.5.0
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=39251
