Compile the attached source code with options -Os -march=armv5te -mthumb, gcc
generates:
push {lr}
ldr r3, [r1, #4] // redundant
ldrb r3, [r3] // redundant
@ sp needed for prologue
pop {pc}
There are two redundant instructions.
Compile it with options -O2 -march=armv5te -mthumb, gcc generates following
expected results.
foo:
@ sp needed for prologue
bx lr
The optimization done in -O2 is from this patch
http://gcc.gnu.org/viewcvs?view=revision&revision=145172. But this piece of
code was in pre pass, it is disabled when -Os is specified, so the unoptimized
code was passed to rtl passes. In rtl passes, the dead store is caught and
removed with some related code, but not all of them were removed, so we can
still see the two redundant instruction.
We should also add this optimization to dead store elimination pass to benefit
-Os cases.
--
Summary: missed dead store elimination
Product: gcc
Version: 4.5.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: tree-optimization
AssignedTo: unassigned at gcc dot gnu dot org
ReportedBy: carrot at google dot com
GCC build triplet: i686-linux
GCC host triplet: i686-linux
GCC target triplet: arm-eabi
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=41778
