The compiler gives ICE on valid code.
Invocation:
gcc -O3 -S x.c
Test case:
void
foo (void)
{
char a[1024];
char *p = &a[0];
char *p2;
p2 = p + 1024;
do
{
p += 2;
*(p-2) = 1;
*(p-1) = 1;
} while (p < p2);
}
Output:
x.c: In function 'foo':
x.c:3: error: missing definition
for SSA_NAME: SMT.9_14 in statement:
SMT.9_8 = PHI <SMT.9_10(D)(2), SMT.9_14(4)>
PHI argument
SMT.9_14
for PHI node
SMT.9_8 = PHI <SMT.9_10(D)(2), SMT.9_14(4)>
x.c:3: internal compiler error: verify_ssa failed
Description:
Bellow is x.c.106t.vect for target PowerPC 603e, but the same ICE
happens for altivec and for x86_64. The vectorizer replaces the two
original stores with one vector store, leaving behind a bad SMT phi
node.
Pass statistics:
----------------
Vectorized loops: 1
Merging blocks 2 and 6
foo ()
{
unsigned intD.3 ivtmp.31D.1297;
vector charD.1 * ivtmp.30D.1296;
vector charD.1 * vect_pa.29D.1295;
vector charD.1 * vect_pa.25D.1291;
vector charD.1 vect_cst_.24D.1290;
unsigned intD.3 ivtmp.23D.1283;
charD.1 * p2D.1254;
charD.1 * pD.1253;
charD.1 aD.1252[1024];
charD.1 * D.1258;
# BLOCK 2 freq:100
# PRED: ENTRY [100.0%] (fallthru,exec)
p2D.1254_3 = &aD.1252 + 1024;
vect_cst_.24D.1290_18 = { 1, 1, 1, 1 };
vect_pa.29D.1295_19 = (vector charD.1 *) &aD.1252;
vect_pa.25D.1291_20 = vect_pa.29D.1295_19;
# SUCC: 3 [100.0%] (fallthru)
# BLOCK 3 freq:10000
# PRED: 2 [100.0%] (fallthru) 4 [100.0%] (fallthru,dfs_back,exec)
# ivtmp.31D.1297_23 = PHI <0(2), ivtmp.31D.1297_24(4)>
# ivtmp.30D.1296_21 = PHI <vect_pa.25D.1291_20(2), ivtmp.30D.1296_22(4)>
# ivtmp.23D.1283_16 = PHI <512(2), ivtmp.23D.1283_17(4)>
# SMT.9D.1269_8 = PHI <SMT.9D.1269_10(D)(2), SMT.9D.1269_14(4)>
# =============================================================
# aD.1252_7 = PHI <aD.1252_9(D)(2), aD.1252_25(4)>
# pD.1253_1 = PHI <&aD.1252(2), pD.1253_4(4)>
pD.1253_4 = pD.1253_1 + 2;
# aD.1252_25 = VDEF <aD.1252_7> { aD.1252 }
*ivtmp.30D.1296_21 = vect_cst_.24D.1290_18;
D.1258_6 = pD.1253_4 + -1;
ivtmp.23D.1283_17 = ivtmp.23D.1283_16 - 1;
ivtmp.30D.1296_22 = ivtmp.30D.1296_21 + 4;
ivtmp.31D.1297_24 = ivtmp.31D.1297_23 + 1;
if (ivtmp.31D.1297_24 < 256)
goto <bb 4>;
else
goto <bb 5>;
# SUCC: 4 [99.0%] (true,exec) 5 [1.0%] (false,exec)
# BLOCK 4 freq:9900
# PRED: 3 [99.0%] (true,exec)
goto <bb 3>;
# SUCC: 3 [100.0%] (fallthru,dfs_back,exec)
# BLOCK 5 freq:100
# PRED: 3 [1.0%] (false,exec)
return;
# SUCC: EXIT [100.0%]
}
My solution:
After each loop is vectorized, and SSA is updated, I re-compute alias
info. I am not familiar with the vectorizer sources, so I don't know
if there is a more efficient way to fix this problem, and still be
sure it would be correct for all inputs.
This attached patch fixed the problem for 603e, altivec, and
x86_64. Regression tests done for 603e and it is under way for x86_64.
--
Summary: ICE on valid code
Product: gcc
Version: 4.4.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: tree-optimization
AssignedTo: unassigned at gcc dot gnu dot org
ReportedBy: edmar at freescale dot com
GCC build triplet: powerpc-unknown-linux-gnu
GCC host triplet: powerpc-unknown-linux-gnu
GCC target triplet: powerpc-unknown-linux-gnu
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=39529
